Journal of Astronautics ›› 2011, Vol. 32 ›› Issue (3): 652-659.doi: 10.3873/j.issn.1000-1328.2011.03.030

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Research on SAT Solver-Based PFGA Permanent Failure Fault Tolerant Technique

SUN Zhao-wei, LIU Yuan, ZHAO Dan, CHEN Jian, ZHANG Shi-jie   

  1. Research Center of Satellite Technology, Harbin Institute of Technology, Harbin 150080,China
  • Received:2010-01-25 Revised:2010-09-25 Online:2011-03-15 Published:2011-03-29

Abstract: FPGA is a kind of semiconductor device and it could be damaged by extern high energy cosmic ray in space. The permanent failure of reconfigurable SRAM based FPGA can not be cleared. Therefore a multiple redundancy technique is adopted to enhance system’s reliability. However, it doubles or even triples the hardware consumption of electronic system. In this paper a method for repairing FPGA’s permanent failure is proposed, by using FPGA’s own redundancy resource. This method transforms FPGA’s inner model into a satisfiability problem (SAT) and solves it by a modified SAT solver. And then an alternative circuit with the function equivalent to original circuit on the damaged FPGA can be obtained . Compared with genetic algorithm, the new method requires less computational effort and smaller memory, is more suitable for space applications.

Key words: FPGA, Fault tolerant, Permanent failure, Satisfiability problem (SAT), SAT solver

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